CFP

ITC-Asia2024: IEEE International Test Conference in Asia

Changsha, China, August 18-20, 2024

Conference website	http://www.castest.com.cn/itcasia2024
Submission link	https://easychair.org/conferences/?conf=itcasia2024
Abstract registration deadline	April 8, 2024
Submission deadline	April 15, 2024

With the test technology facing its grand challenges to ensure the quality of ICs and electronic systems incorporating more and more sophisticated manufacturing processes and system integration technologies in various emerging applications such as Internet of Things, cloud computing, automotive electronics, etc., global proliferation and cooperation is increasingly more important. International Test Conference has been a flagship conference in test technology since 1970. With an attempt to stimulate more discussion and interaction between the academia and the industry around the globe, the 1st ITC-Asia was initiated in Taipei in 2017, and the 8th ITC-Asia will be held in Changsha China in 2024. Outstanding papers with extension will be invited to ITC 2024.

Submission Guidelines

Regular paper submissions should be made electronically by PDF manuscripts only, not exceeding 6 pages in IEEE 2-column format (including abstract, figures, tables, and bibliography). A submission will be considered evidence that upon acceptance at least one author will attend the conference to make the presentation. Authors of accepted papers are also responsible for preparing the final manuscripts in time to be included in the electronic proceeding. Conference content will be submitted for inclusion into IEEE Xplore as well as other Abstracting and Indexing (A&I) databases. At least one full registration to the conference is required for each accepted paper.

Submission Timeline

Abstract Deadline April 8, 2024.
Manuscript Deadline April 15, 2024.
Accept/Reject Notifications Sent May 29, 2024.
Proceedings Manuscript Deadline June 30, 2024.

List of Topics

Hardware Oriented Security and Trust
Autonomous Testing
Heterogeneous Testing
AI test and Test for AI
Design Validation and Debug
ATE Design
Analog and Mixed-Signal Test
RF Test
High-Speed I/O Test
Fault Modeling and Simulation
ATPG (Automatic Test Pattern Generation)
Design for Testability
Built-In Self-Test
Delay Test
System-on-Chip Test
Test Compression
Power-Aware and/or Thermal-Aware Test
Memory Test, Diagnosis, and Repair
Reliability and Testing for Emerging/Approximate/Quantum Computing
Fault Diagnosis and Failure Analysis
Yield Analysis and Learning
Safety and Test for Automotive ICs
Test for Internet of Things
Test for Emerging Devices
CPU/GPU Test
MEMS/Sensor Test
Online Test
On-Chip Measurement
SiP, Chiplet, 2.5D and 3D IC Test
Interconnect Test
Board-Level Testing and Diagnosis
Test Standards
Test Economics
Reliability Issues
Fault Tolerance
Test for Reconfigurable Systems
Software Test and Reliability
Dependable Systems and Networks

Committees

General Co-Chairs

Huawei Li (Institute of Computing Technology, Chinese Academy of Sciences)
Gang Qu (University of Maryland, College Park)

Program Co-Chairs

Jiliang Zhang (Hunan University)
Aibin Yan (Hefei University of Technology)

Local Arrangement Co-Chairs

Jingru Sun (Hunan University)
Qiang Wu (Hunan University)

Registration Chair

Kuncai Zhong (Hunan University)

Special Session Chair

Zhaojun Lu (Huazhong University of Science and Technology)

Finance Chair

He Li (Southeast University)

Publication Chair

Qinghui Hong (Hunan University)

Publicity Chair

Yongfu Li (Shanghai Jiao Tong University)

Japan Liaison

Hideyuki Ichihara (Hiroshima City University)

Taiwan Liaison

Shi-Yu Huang (National Tsing Hua University)

Sponsorship Chair

Xuanyu Zhang (WhoKe Microelectronics Co., Ltd.)

Contact

All questions about submissions should be emailed to zhangjiliang@hnu.edu.cn.