Task Mapping and Scheduling in FPGA-Based Heterogeneous Real-Time Systems: a RISC-V Case-Study

EasyChair Preprint 8979

Abstract

Heterogeneous platforms, that integrate CPU and FPGA-based processing units, are emerging as a promising solution for accelerating various applications in the embedded system domain. However, in this context, comprehensive studies that combine the theoretical aspects of real-time scheduling of tasks along with practical runtime architectural characteristics have mostly been neglected so far.

To fill this gap, in this paper we propose a real-time scheduling algorithm with the objective of minimizing the overall execution time under hardware resource constraints for heterogeneous CPU+FPGA architectures. In particular, we propose an Integer Linear Programming (ILP) based technique for task allocation and scheduling. We then show how to implement a given scheduling on a practical CPU+FPGA system regarding current technology restrictions and validate our methodology using a practical RISC-V case-study. Our experiments demonstrate that performance gains of 40% and area usage reductions of 67% are possible compared to a full software and hardware execution, respectively.

Keyphrases: FPGA, Heterogeneous embedded systems, Integer Linear Programming, RISC-V, Scheduling

@booklet{EasyChair:8979,
  author    = {Sallar Ahmadi-Pour and Sangeet Saha and Vladimir Herdt and Rolf Drechsler and Klaus McDonald-Maier},
  title     = {Task Mapping and Scheduling in FPGA-Based Heterogeneous Real-Time Systems: a RISC-V Case-Study},
  howpublished = {EasyChair Preprint 8979},
  year      = {EasyChair, 2022}}