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FastPath: Towards Wire-speed NVMe SSDs

EasyChair Preprint no. 329

8 pagesDate: July 8, 2018


The constant growth of data and its importance to drive Machine Learning and Big Data is pushing storage systems towards ever increasing I/O bandwidth and lower latency requirements. In recent years, the Non Volatile Memory Express (NVMe) standard has enabled SSD drives to deliver high I/O rates by allowing the storage to be connected directly via the fastest available interconnect to the processing chip. In parallel, the adoption of FPGAs in data centers is creating opportunities to accelerate various applications and/or Operating System (OS) operations. While, FPGAs in data centers have been connected via PCIe to mostly x86 servers, we have now also available heterogeneous SoCs with multi-cores and FPGAs integrated on the same die and connected by an on-chip interconnect.

In this paper, we present how to rethink and accelerate NVMe performance on heterogeneous SoC with integrated FPGAs providing a first research insight on the performance benefits of such an approach. We provide an analysis of the Linux block I/O layer and showcase the relationship between the system's performance and its I/O implementation. Consequently, we introduce an FPGA-based fast path which accelerates the access to the NVMe drive.Our comparative evaluation demonstrates that our FPGA-based FastPath achieves up to 71\% lower latency and up to 5x higher I/O performance against the baseline system on a Zynq development board.

Keyphrases: FPGA, heterogeneous systems, Linux Block I/O, NVMe, SSDs

BibTeX entry
BibTeX does not have the right entry for preprints. This is a hack for producing the correct reference:
  author = {Athanasios Stratikopoulos and Christos Kotselidis and John Goodacre and Mikel Lujan},
  title = {FastPath: Towards Wire-speed NVMe SSDs},
  howpublished = {EasyChair Preprint no. 329},
  doi = {10.29007/rgnt},
  year = {EasyChair, 2018}}
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